Design-Reuse

Design Compiler Topographical Technology-Based ARM-Synopsys Reference Methodology Delivers Higher Productivity

Enhanced Methodology Accelerates Time-to-Market for ARM Processors, Including Next-generation ARM Cortex-R4 Processor MOUNTAIN VIEW, California -- May 15, 2006-- Synopsys, Inc. (Nasdaq: SNPS), a world ...
EDN

A new generation for Design Compiler

Synopsys this morning announced a new release of the company’s cornerstone product: Design Compiler 2010. In response to the many new issues created by advanced geometries, this new release offers two ...
Design-Reuse

Design Compiler 2010 Doubles Productivity of Synthesis and Place and Route

MOUNTAIN VIEW, Calif., March 29, 2010 -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced Design Compiler® ...
CNN

Synopsys Custom Compiler Doubles New Customer Adoptions, Introduces New Release

New Extraction Fusion and DRC Fusion technologies enable tighter design/layout collaboration and fewer late-stage design iterations Visually-assisted automation proven to deliver 2-10X better ...
EDN

Samsung Widely Deploys Synopsys’ Design Compiler Graphical for Mobile SoC Designs

Broad deployment of Design Compiler Graphical for Samsung Mobile SoCs Reduced routing congestion leads to 10 percent smaller area for highly congested blocks Minimal use of Low-Vt cells reduces ...
Semiconductor Engineering

Accelerate Custom Layout Using Custom Compiler’s User-Defined Device (UDD)

In this 7th video of the series, Kai Wang, Director of Engineering at Synopsys, discusses in-design electrical analysis, and why it is critical to use signoff engines to check and fix resistance, ...